The present invention relates to a switching regulator(hereinafter referred to as a "SW regulator") control circuit and an SW regulator of the PFM (pulse frequency modulation) type which can supply a large current to a load even with a low-input power supply voltage in accordance with a value of an input supply voltage of a SW regulator, and which is small in ripple voltage even with a high input power supply voltage.
As a conventional PFM SW regulator control circuit, there has been known an SW regulator control circuit shown in a circuit diagram of FIG. 5. That is, there is provided a comparator 13 that compares a reference voltage value Vref of a first reference voltage circuit 10 with a voltage at a node of bleeder resistors 11 and 12 that divide an output voltage Vout of an output terminal 5 of the SW regulator. Assuming that the output voltage of the reference voltage circuit 10 is Vref, and the voltage of the node of the bleeder resistors 11 and 12 is va, if Vref&gt;Va, an output Vcomp of the comparator 13 becomes high in level, but conversely, if Vref&lt;Va, the output Vcomp becomes low in level. The output Vcomp of the comparator 13 is supplied to one input terminal of an AND gate 17, and an output Vosc of a second the comparator 16 is supplied to the other input terminal of the AND gate 17. The output Vosc of the second comparator 16 compares triangular wave Vos outputted from an oscillator circuit 14 with a reference voltage value Vref2 of a second reference voltage circuit 15 to produce a rectangular wave having a given duty ratio (hereinafter referred to as "duty ratio"). The ratio of turning on a switch element used in the SW regulator to the oscillating period is a PFM-DUTY ratio. In other words, when the output voltage is lower than a normal voltage, an output Vcomp of the first comparator 13 becomes high in level, and the second output Vosc of the comparator 16 is made equal to the output Vand of the AND gate 17 with the result that the switch element used in the SW regulator is turned on/off by the output Vosc. Conversely, when the output voltage is higher than the normal voltage, the output of the first comparator 13 becomes low in level, and the output Vand of the AND gate 17 becomes low in level with the result that the switch element used in the SW regulator is kept in an off state.
FIG. 6 shows the voltage waveforms of the respective portions of the SW regulator shown in FIG. 5 with the axis of abscissa representing time.
In general, in the SW regulator, as a period of time during which the SW is on is long, a capacity for supplying an electric power to the load becomes higher. Accordingly, in case of the SW regulator of the PFM system, even if the load is heavy to some degree, the PFM-DUTY ratio is set at a certain value of about 50 to 90% so that an energy can be supplied sufficiently. The PFM-DUTY ratio is always held to a constant value regardless of the supply voltage.
However, the conventional SW regulator of the PFM type suffers from the following problems. That is, because the PFM-DUTY ratio is held constant regardless of the supply voltage, if the PFM-DUTY ratio is set to be small, when the supply voltage is low, the energy in a coil used in a PFM to switching power supply is small so that a large load current cannot be supplied. Also, if the PFM-DUTY ratio is set to be large, when the supply voltage is high, because energy in a the coil of the switching power supply is large, a large ripple voltage occurs in the output voltage.
In view of the above, in order to solve the conventional problems, an object of the present invention is to impart a supply voltage dependency to the PFM-DUTY ratio of the SW regulator of the PFM type so as to set the PFM-DUTY ratio to be large when the supply voltage is low, and to set the PFM-DUTY ratio to be small when the supply voltage is high, so that an energy can be sufficiently supplied to a load even at a low supply voltage, and a ripple voltage is suppressed when the supply voltage is high.